Summary

 Design Name  cpld
 Fitting Status  Successful
 Software Version  P.68d
 Device Used  XC9536-15-VQ44
 Date   1-13-2015, 5:35PM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
30/36  (84%) 43/180  (24%) 18/36  (50%) 30/34  (89%) 64/72  (89%)

PIN RESOURCES
Signal Type Required Mapped
 Input  16  16
 Output  10  10
 Bidirectional  3  3
 GCK  1  1
 GTS  0  0
 GSR  0  0
Pin Type Used Total
 I/O   25  29
 GCK/IO  3  3
 GTS/IO  1  2
 GSR/IO  1  1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK3)  clk

POWER DATA
 Macrocells in high performance mode (MCHP)  30
 Macrocells in low power mode (MCLP)  0
 Total macrocells used (MC)  30