Design Name | cpld |
Fitting Status | Successful |
Software Version | P.68d |
Device Used | XC9536-15-VQ44 |
Date | 1-13-2015, 5:35PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
30/36 (84%) | 43/180 (24%) | 18/36 (50%) | 30/34 (89%) | 64/72 (89%) |
|
|
Signal mapped onto global clock net (GCK3) | clk |
Macrocells in high performance mode (MCHP) | 30 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 30 |