I’m working with my Xilinx Spartan 3A FPGA board for the moment, and I’ve finally made some visible progress. I’ve never been so happy to see a Sad Mac! A boot failure may not seem very exciting, but I’m thrilled that it’s actually doing something recognizably Macintosh-like. That means it’s actually running 68000 code from the Mac ROM, which is drawing stuff to the screen buffer, which is getting read by the video module and displayed to the VGA screen. From here it will be a long, slow road of implementing replacements for the VIA, SCC, IWM, and other components.
Using a FPGA dev board for initial development makes it much easier to get started than it would be with a pile of discrete ICs. All the other “hardware” is actually synthesized inside the FPGA: a 68000 soft-CPU (TG68 core from opencores.org), 32K RAM, and 8K ROM. The synthetic RAM/ROM sizes are much too small for a Macintosh, but are all that would fit inside the FPGA. They’re enough to create a screen buffer and run the initial boot code from ROM, anyway.
I have an Altera DE1 dev board on the way, which has real external SRAM and Flash ROM that I can use instead of the synthetic RAM/ROM. (The Spartan 3A board has DDR RAM that I could never figure out, and ROM that can only be programmed through a serial port.) I haven’t yet decided whether to add a real 68000 to the DE1 on an expansion card, but given how easy it was to get the TG68 soft-CPU working, I’ll probably stick with that.
Eventually I’ll need to construct an expansion card for the Altera DE1 board, containing a microcontroller and some other things, but I should be able to get pretty far with just the DE1. The DE1 is an “educational” board with all kinds of miscellaneous gizmos. My long-term goal is to make an all-custom Plus Too board that contains only the parts actually needed, as well as vintage connectors for a Mac keyboard, mouse, and floppy.
The Sad Mac is appearing because the ROM checksum test failed. That’s not surprising, considering I only implemented the first 8K of the 128K ROM. It’s trying to play a sound, too, by streaming some data through the sound buffer. With some more work to pull bytes from that buffer at 22 KHz, I could hear the glorious boot beep!
Read 13 comments and join the conversation